Changelog
0.5.0
Released on 2022-08-26 - GitHub
What's Changed
Documentation Changes
- Cherry picked commit for addition of Smstateen CSRs. by @silabs-oysteink in #228
- Silabs oysteink merge w24 2 by @silabs-oysteink in #230
- PMP, WARL, style updates by @Silabs-ArjanB in #229
- Removed duplicate outdated mstateen descriptions. Updated table style… by @Silabs-ArjanB in #231
- Silabs oysteink merge w24 3 by @silabs-oysteink in #232
- Added dcsr.EBREAKU related explanations by @Silabs-ArjanB in #233
- Changed parity from odd to even for some of the achk and rchk signals by @Silabs-ArjanB in #264
- Added notes on checksum behavior for sub-word transactions by @Silabs-ArjanB in #266
- Updated exception code for Instruction Bus Fault and Instruction Pari… by @Silabs-ArjanB in #269
- Added integrity and pcharden bits in cpuctrl CSR. Redefined integrity… by @Silabs-ArjanB in #271
- Made mseccfg hardwired to 0x0 if PMP_NUM_REGIONS = 0. Added note that… by @Silabs-ArjanB in openhwgroup/cv32e40x#587
- Corrected instruction set extension chapter with info on custom WFE i… by @Silabs-ArjanB in #284
RTL Changes
- Merge from CV32E40X by @silabs-oysteink in #225
- Fix for issue #70 by @Silabs-ArjanB in #226
- Tied off CLIC CSR rd_error signals when SMCLIC=0. by @silabs-oysteink in #227
- Tied off PMP related signals when PMP not fully configured by @Silabs-ArjanB in #234
- Fix of secureseed*_n for RVFI by @Silabs-ArjanB in #240
- Merge from CV32E40X by @silabs-oysteink in #241
- Merge from CV32E40X + PC hardening updates by @silabs-oysteink in #245
- Merge from CV32E40X by @silabs-oysteink in #246
- Added todos related to recent PRs by @Silabs-ArjanB in #253
- Fix for PMPADDR by @Silabs-ArjanB in #254
- PMP fix (issue 249) by @Silabs-ArjanB in #259
- Fixed two bus related to the combination of debug mode and user level… by @Silabs-ArjanB in #260
- PMP fix (additional fix for issue 249) by @Silabs-ArjanB in #261
- Added WARL resolution functions. Minimizing diff with 40X by @Silabs-ArjanB in #267
- Fix for issue 196 by @Silabs-ArjanB in #268
- Update for readability. SEC clean by @silabs-oivind in #279
- Merge from CV32E40X by @silabs-oysteink in #282
- Merge from CV32E40X by @silabs-oysteink in #285
Documentation Changes inherited from CV32E40X
- Typos, style by @Silabs-ArjanB in openhwgroup/cv32e40x#582
- Changed reset value of tdata1. Removed reset values for mcontrol6 and… by @Silabs-ArjanB in openhwgroup/cv32e40x#583
- Made dcsr.EBREAKM descriptions specific to machine mode. Expanded ins… by @Silabs-ArjanB in openhwgroup/cv32e40x#584
- Explained which addresses are used as compare values for execute/load… by @Silabs-ArjanB in openhwgroup/cv32e40x#585
- Corrected and clarified rvfi_intr, rvfi_dbg table. Fixes https://gith… by @Silabs-ArjanB in openhwgroup/cv32e40x#592
- Added further clarification on rvfi_dbg signal by @Silabs-ArjanB in openhwgroup/cv32e40x#621
- Updated Zc extension version to v0.70.5 by @Silabs-ArjanB in openhwgroup/cv32e40x#625
- Updated exception code for Instruction Bus Fault by @Silabs-ArjanB in openhwgroup/cv32e40x#627
- Fixed bitfield description in mtvec CSR for CLIC by @Silabs-ArjanB in openhwgroup/cv32e40x#631
- Updated OBI to version 1.5.0 by @Silabs-ArjanB in openhwgroup/cv32e40x#632
- Redefined NMI target address for basic non-vectored mode and CLIC mode by @Silabs-ArjanB in openhwgroup/cv32e40x#628
- Made dcsr.stopcount WARL instead of WARL (0x0). stopcount is now defa… by @Silabs-ArjanB in openhwgroup/cv32e40x#636
- Added custom WFE instruction plus related wu_i pin. Made misa.X always 1 by @Silabs-ArjanB in openhwgroup/cv32e40x#639
- Added debug PC sampling interface by @Silabs-ArjanB in openhwgroup/cv32e40x#643
RTL Changes inherited from CV32E40X
- Pipeline flush for JVT writes by @silabs-oysteink in openhwgroup/cv32e40x#575
- Initial implementation of Zc * sequencer by @silabs-oysteink in openhwgroup/cv32e40x#588
- Removed ZC_EXT as top level parameter. ZC_EXT is now a localparam, al… by @Silabs-ArjanB in openhwgroup/cv32e40x#593
- Fix mstatush_n for RVFI hookup by @Silabs-ArjanB in openhwgroup/cv32e40x#595
- Temporarily set localparam ZC_EXT to 0 by @silabs-oysteink in openhwgroup/cv32e40x#597
- Added a 'first_op' to track the first operation of multi operation in… by @silabs-oysteink in openhwgroup/cv32e40x#605
- Refactored interrupt_allowed and halt_id logic. by @silabs-oysteink in openhwgroup/cv32e40x#606
- Sequencer integration by @silabs-oysteink in openhwgroup/cv32e40x#607
- Fix #608 by @davideschiavone in openhwgroup/cv32e40x#609
- Updates to Zc handling in IF stage by @silabs-oysteink in openhwgroup/cv32e40x#612
- Added todos related to recent PRs by @Silabs-ArjanB in openhwgroup/cv32e40x#620
- Removed obsolete RTL signal by @Silabs-ArjanB in openhwgroup/cv32e40x#624
- Fix default assignments by @davideschiavone in openhwgroup/cv32e40x#617
- Converted unique case to regular case with defaults in load_store_uni… by @silabs-oysteink in openhwgroup/cv32e40x#635
- Changed logic for sequence progress detection by @silabs-oysteink in openhwgroup/cv32e40x#638
- Removed exception checking in IF stage by @silabs-oysteink in openhwgroup/cv32e40x#641
- Fix mcause.mpp indices by @silabs-oivind in openhwgroup/cv32e40x#647
- Moved decoding of tablejumps to the sequencer by @silabs-oysteink in openhwgroup/cv32e40x#645
- (Partial) fix for issue #325. by @silabs-oysteink in openhwgroup/cv32e40x#650
Full Changelog: 0.4.0...0.5.0
0.4.0
Released on 2022-06-07 - GitHub
What's Changed
Documentation Changes
- Added RISC-V State Enable Extension (Smstateen) by @Silabs-ArjanB in #181
- Clarified when parity and checksum faults lead to alerts on alert_maj… by @Silabs-ArjanB in #183
- Fixed PMP granularity formula by @Silabs-ArjanB in #184
- Added additional minor alert sources by @Silabs-ArjanB in #186
- Removed random data feature by @Silabs-ArjanB in #187
- Changed reset values of mcontrol6.m, mcontrol6.execute and etrigger.m… by @Silabs-ArjanB in #191
- Updated list of Xsecure features by @Silabs-ArjanB in #192
- Described that push and pop operations are not allowed on non-idempot… by @Silabs-ArjanB in #199
- Reordered content in exceptions and interrupts chapter for clarity by @Silabs-ArjanB in #200
- Removed reference to uret by @Silabs-ArjanB in #210
- Fixed description of mcounteren as that did not get properly merged in… by @silabs-oysteink in #213
- Silabs oysteink merge w22 2 by @silabs-oysteink in #215
- Table width fixes by @Silabs-ArjanB in #223
RTL Changes
- Add missing LIB parameter in CLIC CSR's by @silabs-oivind in #171
- Implemented user mode related changes for CLIC. by @silabs-oysteink in #170
- Tie off mie_rd_error when mie CSR is not implemented by @silabs-oivind in #172
- Added use of USE_DEPRECATED_FEATURE_SET in the pc_check module. by @silabs-oysteink in #173
- Silabs oysteink merge16 by @silabs-oysteink in #174
- Removed parantheses in a cast (flagged as error when using questa) by @silabs-oysteink in #175
- pc_check updates for CLIC pointers. by @silabs-oysteink in #176
- Silabs oysteink merge w17 1 by @silabs-oysteink in #177
- Updates after running formal by @silabs-oysteink in #178
- Silabs oysteink merge w17 2 by @silabs-oysteink in #179
- Register file ECC bit inversion by @silabs-halfdan in #180
- Made mcounteren WARL 0x0 by @Silabs-ArjanB in #182
- Removed unused cpuctrl.rnddata bitfield by @Silabs-ArjanB in #188
- Silabs oysteink merge jvt stall by @silabs-oysteink in #204
- Unifying interrupt controllers; aligning cs registers syntax with cor… by @Silabs-ArjanB in #216
- Fixed CSR hardening by @Silabs-ArjanB in #218
- Merge from cv32e40x by @silabs-oysteink in #219
- Reduced profiling infrastructure. Removed support for Zihpm and Zicntr by @Silabs-ArjanB in #221
- Implemented Smstateen for table jumps by @silabs-oysteink in #222
Documentation Changes inherited from CV32E40X
- Corrected R/W information for minhv, mclicbase. Added further explana… by @Silabs-ArjanB in openhwgroup/cv32e40x#495
- Removed rvfi_sleep and rvfi_wu by @Silabs-ArjanB in openhwgroup/cv32e40x#504
- Added fence.i related notes. Added mstateen CSRs (applicable to CV32E… by @Silabs-ArjanB in openhwgroup/cv32e40x#524
- Made mcounteren WARL 0x0 by @Silabs-ArjanB in openhwgroup/cv32e40x#525
- Added modifiable attribute as being implied by main PMA attribute by @Silabs-ArjanB in openhwgroup/cv32e40x#527
- Corrected RW into WARL for mseccfg.RLB, mseccfg.MMWP, mseccfg.MML, pm… by @Silabs-ArjanB in openhwgroup/cv32e40x#529
- mtvec.mode is a 2-bit WARL bitfield. Require write buffer flush before retiring fence.i by @Silabs-ArjanB in openhwgroup/cv32e40x#532
- Removed mcontext and mscontext CSRs by @Silabs-ArjanB in openhwgroup/cv32e40x#535
- etrigger.m and mcontrol6.m are now fully implemented (reset values changed as well) by @Silabs-ArjanB in openhwgroup/cv32e40x#537
- Described that push and pop operations are not allowed on non-idempot… by @Silabs-ArjanB in openhwgroup/cv32e40x#543
- Reordered content in exceptions and interrupts chapter for clarity by @Silabs-ArjanB in openhwgroup/cv32e40x#544
- Fixed mcause reset value for SMCLIC=1 configuration by @Silabs-ArjanB in openhwgroup/cv32e40x#550
- Updated jvt and mstateen0 CSRs according to latest Zc* clarifications… by @Silabs-ArjanB in openhwgroup/cv32e40x#554
- Changed dcsr.mprven to WARL 0x1. Added note on ecall behavior in debu… by @Silabs-ArjanB in openhwgroup/cv32e40x#559
- Fixed comment related to dcsr.mprven value by @Silabs-ArjanB in openhwgroup/cv32e40x#564
- Prevented table scrollbars by @Silabs-ArjanB in openhwgroup/cv32e40x#573
- Table width fixes by @Silabs-ArjanB in openhwgroup/cv32e40x#574
RTL Changes inherited from CV32E40X
- minstret rvfi reporting fix for WFI by @Silabs-ArjanB in openhwgroup/cv32e40x#505
- Implementation of mnxti by @silabs-oysteink in openhwgroup/cv32e40x#506
- First step towards merged decoder by @Silabs-ArjanB in openhwgroup/cv32e40x#508
- Moved two instructions from predecoder to decoder by @Silabs-ArjanB in openhwgroup/cv32e40x#510
- Removed nmi_addr_i; removed USE_DEPRECATED_FEATURE_SET parameter by @Silabs-ArjanB in openhwgroup/cv32e40x#512
- Bugfix: mnxti data forwarding causing wrong operand values by @silabs-oysteink in openhwgroup/cv32e40x#511
- Decoder interface change by @silabs-oysteink in openhwgroup/cv32e40x#513
- Bugfixes after running formal by @silabs-oysteink in openhwgroup/cv32e40x#514
- Speeding up decoder by @Silabs-ArjanB in openhwgroup/cv32e40x#516
- Reverting merged decoder introduction by @Silabs-ArjanB in openhwgroup/cv32e40x#519
- Critical path improvements impacting jump, mret in decoder, bypass mo… by @Silabs-ArjanB in openhwgroup/cv32e40x#521
- Implemented all C0 instructions from Zc v 0.70.1. by @silabs-oysteink in openhwgroup/cv32e40x#528
- Implemented cm.lbu and cm.lhu from Zc C2. by @silabs-oysteink in openhwgroup/cv32e40x#531
- Made jumps and mrets depend on alu_en and sys_en, as this change led … by @silabs-oysteink in openhwgroup/cv32e40x#536
- Removed mscontext and mcontext CSRs by @Silabs-ArjanB in openhwgroup/cv32e40x#534
- Minimizing syntax/style differences with CV32E40S by @Silabs-ArjanB in openhwgroup/cv32e40x#538
- Fixed dependency between Zc and Zbb by @Silabs-ArjanB in openhwgroup/cv32e40x#545
- Further removal of CLIC pointers using data access. by @silabs-oysteink in openhwgroup/cv32e40x#548
- Fix for issue #549. Clean up CS registers syntax. Tie RVFI to RTL ins… by @Silabs-ArjanB in openhwgroup/cv32e40x#555
- Initial version of RVFI OBI tracking by @Silabs-ArjanB in openhwgroup/cv32e40x#560
- Moved instruction address word alignment to core boundary by @Silabs-ArjanB in openhwgroup/cv32e40x#562
- Removed shadow CSR related code by @Silabs-ArjanB in openhwgroup/cv32e40x#563
- Unifying interrupt controllers; aligning cs registers syntax with cor… by @Silabs-ArjanB in openhwgroup/cv32e40x#566
- Fix for issue #558 by @silabs-oysteink in openhwgroup/cv32e40x#567
Full Changelog: 0.3.0...0.4.0
0.3.0
Released on 2022-03-29 - GitHub
What's Changed
Documentation Changes
- Changed WARL resolution to preserved/unchanged by @Silabs-ArjanB in #164
Documentation Changes inherited from CV32E40X
- Fixed mpie R/W attribute by @Silabs-ArjanB in openhwgroup/cv32e40x#481
- Added sleep signals to rvfi documentation by @silabs-halfdan in openhwgroup/cv32e40x#482
- Changed WARL resolution to preserved/unchanged by @Silabs-ArjanB in openhwgroup/cv32e40x#489
- Better explanation of mtvt WARL behavior by @Silabs-ArjanB in openhwgroup/cv32e40x#490
- Updated WARL behavior of pmpxcfg by @Silabs-ArjanB in openhwgroup/cv32e40x#491
RTL Changes inherited from CV32E40X
- Updated typedefs for CSR registers to match new fields in the user manual by @silabs-oysteink in openhwgroup/cv32e40x#480
- CLIC: Spec chapter 5.1 by @silabs-oysteink in openhwgroup/cv32e40x#485
- CLIC: Spec chapter 5.3 by @silabs-oysteink in openhwgroup/cv32e40x#486
Full Changelog: 0.2.0...0.3.0
0.2.0
Released on 2022-03-18 - GitHub
What's Changed
Documentation Changes
- Documentation: Updated lfsr configuration parameter documentation by @silabs-halfdan in #137
- Described OBI parity and checksum signals by @Silabs-ArjanB in #151
- Described PMA integrity attribute by @Silabs-ArjanB in #154
- Detailed integrity checksum checking rules. Moved to OBI v1.4 by @Silabs-ArjanB in #157
- Update CLIC version by @Silabs-ArjanB in #163
Documentation Changes inherited from CV32E40X
- Rename pma_region_t -> pma_cfg_t in documentation by @silabs-oivind in openhwgroup/cv32e40x#447
- Updated to OBI v1.3 by @Silabs-ArjanB in openhwgroup/cv32e40x#449
- Made rvfi_intr multibit by @silabs-halfdan in openhwgroup/cv32e40x#459
- Split mimpid into major, minor, patch parts by @Silabs-ArjanB in openhwgroup/cv32e40x#460
- Updated documentation of rvfi trap and intr structs by @silabs-halfdan in openhwgroup/cv32e40x#467
- Document USE_DEPRECATED_FEATURE_SET by @silabs-halfdan in openhwgroup/cv32e40x#469
- Increased allowed SMCLIC_ID_WIDTH range. Moved to OBI v1.4 by @Silabs-ArjanB in openhwgroup/cv32e40x#470
- Removed mention of deprecated nmi_addr_i signal from user manual. Def… by @Silabs-ArjanB in openhwgroup/cv32e40x#473
- Increased SMCLIC_ID_WIDTH range. Removed wrong preemption example cod… by @Silabs-ArjanB in openhwgroup/cv32e40x#474
- Fix typo in doc by @silabs-oivind in openhwgroup/cv32e40x#476
- Update CLIC version by @Silabs-ArjanB in openhwgroup/cv32e40x#477
RTL Changes
- Finalized core interface by @silabs-halfdan in #138
- Flush pipeline upon PMP CSR updates by @silabs-oivind in #128
- Pmp todo cleanup by @silabs-oivind in #141
- WARL updates for pmpncfg. Fix github issue #100 by @silabs-oivind in #140
- Added parity signals to core interfaces, removed top level parameters by @silabs-halfdan in #142
- Update MPU to support data access in instruction side. by @silabs-oivind in #144
- Removed obsolete bitfields by @Silabs-ArjanB in #146
- Added module for hardening of PC by @silabs-oysteink in #139
- Added parity and checksum generation by @Silabs-ArjanB in #150
- Added integrity bit to PMA by @Silabs-ArjanB in #152
- PMP_PMPADDR_RV fix by @silabs-oivind in #156
- Fix lint error. Race condition between always_comb blocks. by @silabs-oivind in #155
- Propagate LIB parameter to stdcell wrappers by @silabs-oivind in #162
RTL Changes inherited from CV32E40X
- Parameterized clic irq id by @silabs-halfdan in openhwgroup/cv32e40x#441
- Removed unused clock signal by @Silabs-ArjanB in openhwgroup/cv32e40x#443
- Added monitor ports to xif by @silabs-hfegran in openhwgroup/cv32e40x#445
- Rename pma_region_t -> pma_cfg_t in RTL and SVA by @silabs-oivind in openhwgroup/cv32e40x#446
- Update MPU to support data access in instruction side. In preparation… by @silabs-oivind in openhwgroup/cv32e40x#450
- Removed obsolete bitfields by @Silabs-ArjanB in openhwgroup/cv32e40x#455
- RVFI bugfixes by @silabs-halfdan in openhwgroup/cv32e40x#456
- Split mimpid into major, minor,patch by @Silabs-ArjanB in openhwgroup/cv32e40x#461
- Syntax fix + IF stage fix by @Silabs-ArjanB in openhwgroup/cv32e40x#465
- NMI address update by @silabs-halfdan in openhwgroup/cv32e40x#468
- Changed SMCLIC_ID_WIDTH default to 5 by @Silabs-ArjanB in openhwgroup/cv32e40x#471
Full Changelog: 0.1.0...0.2.0
0.1.0
Released on 2022-02-16 - GitHub
Initial release